IEC: On-Line Education: WPF: Synchronous Optical Network (SONET)

SONET provides substantial overhead information, allowing simpler multiplexing and greatly expanded operations, administration, maintenance, and provisioning (OAM&P) capabilities. The overhead information has several layers, which are shown in Figure 6. Path-level overhead is carried from end-to-end; it is added to DS–1 signals when they are mapped into VTs and for STS–1 payloads that travel end-to-end. Line overhead is for the STS–N signal between STS–N multiplexers. Section overhead is used for communications between adjacent network elements such as regenerators.

Enough information is contained in the overhead to allow the network to operate and allow OAM&P communications between an intelligent network controller and the individual nodes.

Figure 6. Overhead Layers

The following sections detail the different SONET overhead information:

section overhead
line overhead
STS POH
VT POH

This information has been updated to reflect changes in Bellcore GR–253, Issue 2, December 1995.

Section Overhead

Section overhead contains 9 bytes of the transport overhead accessed, generated, and processed by section-terminating equipment. This overhead supports functions such as the following:

performance monitoring (STS–N signal)
local orderwire
data communication channels to carry information for OAM&P
framing

This might be two regenerators, line-terminating equipment and a regenerator, or two sets of line-terminating equipment. The section overhead is found in the first three rows of columns 1 to 9 (See Figure 7).

Figure 7. Section Overhead–Rows 1 to 3 of Transport Overhead

Table 3 shows section overhead byte by byte.

Byte Description

A1 and A2 framing bytes—These two bytes indicate the beginning of an STS–1 frame.

J0 section trace (J0)/section growth (Z0)—The byte in each of the N STS–1s in an STS–N that was formally defined as the STS–1 ID (C1) byte has been refined either as the section trace byte (in the first STS–1 of the STS–N), or as a section growth byte (in the second through Nth STS–1s).

B1 section bit-interleaved parity code (BIP–8) byte—This is a parity code (even parity), used to check for transmission errors over a regenerator section. Its value is calculated over all bits of the previous STS–N frame after scrambling then placed in the B1 byte of STS–1 before scrambling. Therefore, this byte is defined only for STS–1 number 1 of an STS–N signal.

E1 section orderwire byte—This byte is allocated to be used as a local orderwire channel for voice communication between regenerators, hubs, and remote terminal locations.

F1 section user channel byte—This byte is set aside for the users' purposes. It terminates at all section-terminating equipment within a line. It can be read and written to at each section-terminating equipment in that line.

D1, D2, and D3 section data communications channel (DCC) bytes—Together, these 3 bytes form a 192–kbps message channel providing a message-based channel for OAM&P between pieces of section-terminating equipment. The channel is used from a central location for alarms, control, monitoring, administration, and other communication needs. It is available for internally generated, externally generated, or manufacturer-specific messages.

Table 3. Section Overhead

Line Overhead

Line overhead contains 18 bytes of overhead accessed, generated, and processed by line-terminating equipment. This overhead supports functions such as the following:

locating the SPE in the frame
multiplexing or concatenating signals
performance monitoring
automatic protection switching
line maintenance

Line overhead is found in rows 4 to 9 of columns 1 to 9 (see Figure 8).

Figure 8. Line Overhead: Rows 4 to 9 of Transport Overhead

Table 4 shows line overhead byte by byte.

Byte Description

H1 and H2 STS payload pointer (H1 and H2)—Two bytes are allocated to a pointer that indicates the offset in bytes between the pointer and the first byte of the STS SPE. The pointer bytes are used in all STS–1s within an STS–N to align the STS–1 transport overhead in the STS–N and to perform frequency justification. These bytes are also used to indicate concatenation and to detect STS path alarm indication signals (AIS–P).

H3 pointer action byte (H3)—The pointer action byte is allocated for SPE frequency justification purposes. The H3 byte is used in all STS–1s within an STS–N to carry the extra SPE byte in the event of a negative pointer adjustment. The value contained in this byte when it is not used to carry the SPE byte is undefined.

B2 line bit-interleaved parity code (BIP–8) byte—This parity code byte is used to determine if a transmission error has occurred over a line. It is even parity and is calculated over all bits of the line overhead and STS–1 SPE of the previous STS–1 frame before scrambling. The value is placed in the B2 byte of the line overhead before scrambling. This byte is provided in all STS–1 signals in an STS–N signal.

K1 and K2 automatic protection switching (APS channel) bytes—These 2 bytes are used for protection signaling between line-terminating entities for bidirectional automatic protection switching and for detecting alarm indication signal (AIS–L) and remote defect indication (RDI) signals.

D4 to D12 line data communications channel (DCC) bytes—These 9 bytes form a 576–kbps message channel from a central location for OAM&P information (alarms, control, maintenance, remote provisioning, monitoring, administration, and other communication needs) between line entities. They are available for internally generated, externally generated, and manufacturer-specific messages. A protocol analyzer is required to access the line–DCC information.

S1 synchronization status (S1)—The S1 byte is located in the first STS–1 of an STS–N, and bits 5 through 8 of that byte are allocated to convey the synchronization status of the network element.

Z1 growth (Z1)—The Z1 byte is located in the second through Nth STS–1s of an STS–N (3 <= N <= 48) and are allocated for future growth. Note that an OC–1 or STS–1 electrical signal does not contain a Z1 byte.

M0 STS–1 REI–L (M0)—The M0 byte is only defined for STS–1 in an OC–1 or STS–1 electrical signal. Bits 5 through 8 are allocated for a line remote error indication function (REI–L, formerly referred to as line FEBE), which conveys the error count detected by an LTE (using the line BIP–8 code) back to its peer LTE.

M1 STS–N REI–L (M1)—The M1 byte is located in the third STS–1 (in order of appearance in the byte-interleaved STS–N electrical or OC–N signal) in an STS–N (N >= 3) and is used for a REI–L function.

Z2 growth (Z2)—The Z2 byte is located in the first and second STS–1s of an STS–3 and the first, second, and fourth through Nth STS–1s of an STS–N (12 <= N <= 48). These bytes are allocated for future growth. Note that an OC–1 or STS–1 electrical signal does not contain a Z2 byte.

E2 orderwire byte—This orderwire byte provides a 64–kbps channel between line entities for an express orderwire. It is a voice channel for use by technicians and will be ignored as it passes through the regenerators.

Table 4. Line Overhead

VT POH

VT POH contains four evenly distributed POH bytes per VT SPE starting at the first byte of the VT SPE. VT POH provides for communication between the point of creation of an VT SPE and its point of disassembly.

Four bytes (V5, J2, Z6, and Z7) are allocated for VT POH. The first byte of a VT SPE (i.e., the byte in the location pointed to by the VT payload pointer) is the V5 byte, while the J2, Z6, and Z7 bytes occupy the corresponding locations in the subsequent 125-microsecond frames of the VT superframe.

The V5 byte provides the same functions for VT paths that the B3, C2, and G1 bytes provide for STS paths—namely error checking, signal label, and path status. The bit assignments for the V5 byte are illustrated in Figure 10.

Figure 10. VT POH—V5 Byte

Bits 1 and 2 of the V5 byte are allocated for error performance monitoring. Bit 3 of the V5 byte is allocated for a VT path REI function (REI–V, formerly referred to as VT path FEBE) to convey the VT path terminating performance back to an originating VT PTE. Bit 4 of the V5 byte is allocated for a VT path remote failure indication (RFI–V) in the byte-synchronous DS–1 mapping. Bits 5 through 7 of the V5 byte are allocated for a VT path signal label to indicate the content of the VT SPE. Bit 8 of the VT byte is allocated for a VT path remote defect indication (RDI–V) signal.

SONET Alarm Structure

The SONET frame structure has been designed to contain a large amount of overhead information. The overhead information provides a variety of management and other functions such as the following:

error performance monitoring
pointer adjustment information
path status
path trace
section trace
remote defect, error, and failure indications
signal labels
new data flag indications
data communications channels (DCC)
automatic protection switching (APS) control
orderwire
synchronization status message

Much of this overhead information is involved with alarm and in-service monitoring of the particular SONET sections.

SONET alarms are defined as follows:

anomaly—This is the smallest discrepancy that can be observed between the actual and desired characteristics of an item. The occurrence of a single anomaly does not constitute an interruption in the ability to perform a required function.
defect—The density of anomalies has reached a level where the ability to perform a required function has been interrupted. Defects are used as input for performance monitoring, the control of consequent actions, and the determination of fault cause.
failure—This is the inability of a function to perform a required action persisted beyond the maximum time allocated.

Table 6 describes SONET alarm anomalies, defects, and failures.

Description Criteria

loss of signal (LOS) LOS is raised when the synchronous signal (STS–N) level drops below the threshold at which a BER of 1 in 10³ is predicted. It could be due to a cut cable, excessive attenuation of the signal, or equipment fault. LOS state clears when two consecutive framing patterns are received and no new LOS condition is detected.

out of frame (OOF) alignment OOF state occurs when four or five consecutive SONET frames are received with invalid (errored) framing patterns (A1 and A2 bytes). The maximum time to detect OOF is 625 microseconds. OOF state clears when two consecutive SONET frames are received with valid framing patterns.

loss of frame (LOF) alignment LOF state occurs when the OOF state exists for a specified time in milliseconds. LOF state clears when an in-frame condition exists continuously for a specified time in milliseconds.

loss of pointer (LOP) LOP state occurs when N consecutive invalid pointers are received or N consecutive new data flags (NDFs) are received (other than in a concatenation indicator), where N = 8, 9, or 10. LOP state clears when three equal valid pointers or three consecutive AIS indications are received.

LOP can also be identified as follows:

STS path loss of pointer (SP–LOP)

VT path loss of pointer (VP–LOP)

alarm indication signal (AIS) The AIS is an all-ones characteristic or adapted information signal. It is generated to replace the normal traffic signal when it contains a defect condition in order to prevent consequential downstream failures being declared or alarms being raised.
AIS can also be identified as follows:

line alarm indication signal (AIS–L)

STS path alarm indication signal (SP–AIS)

VT path alarm indication signal (VP–AIS)

remote error indication (REI) This is an indication returned to a transmitting node (source) that an errored block has been detected at the receiving node (sink). This indication was formerly known as far end block error (FEBE).
REI can also be identified as the following:

line remote error indication (REI–L)

STS path remote error indication (REI–P)

VT path remote error indication (REI–V)

remote defect indication (RDI) This is a signal returned to the transmitting terminating equipment upon detecting a loss of signal, loss of frame, or AIS defect. RDI was previously known as FERF.
RDI can also be identified as the following:

line remote defect indication (RDI–L)

STS path remote defect indication (RDI–P)

VT path remote defect indication (RDI–V)

remote failure indication (RFI) A failure is a defect that persists beyond the maximum time allocated to the transmission system protection mechanisms. When this situation occurs, an RFI is sent to the far end and will initiate a protection switch if this function has been enabled.
RFI can also be identified as the following:

line remote failure indication (RFI–L)

STS path remote failure indication (RFI–P)

VT path remote failure indication (RFI–V)

B1 error Parity errors evaluated by byte B1 (BIP–8) of an STS–N are monitored. If any of the eight parity checks fail, the corresponding block is assumed to be in error.

B2 error Parity errors evaluated by byte B2 (BIP–24 x N) of an STS–N are monitored. If any of the N x 24 parity checks fail, the corresponding block is assumed to be in error.

B3 error Parity errors evaluated by byte B3 (BIP–8) of a VT–N (N = 3, 4) are monitored. If any of the eight parity checks fail, the corresponding block is assumed to be in error.

BIP–2 error Parity errors contained in bits 1 and 2 (BIP–2: bit interleaved parity–2) of byte V5 of an VT–M (M = 11, 12, 2) are monitored. If any of the two parity checks fail, the corresponding block is assumed to be in error.

loss of sequence synchronization (LSS)
Bit error measurements using pseudo-random sequences can only be performed if the reference sequence produced on the synchronization receiving side of the test set-up is correctly synchronized to the sequence coming from the object under test. To achieve compatible measurement results, it is necessary to specify that the sequence synchronization characteristics.

Sequence synchronization is considered to be lost and resynchronization shall be started if the following occur:

Bit error ratio is greater than or equal to 0.20 during an integration interval of 1 second.

It can be unambiguously identified that the test sequence and the reference sequence are out of phase.

Note:
One method to recognize the out-of-phase condition is the evaluation of the error pattern resulting from the bit-by-bit comparison. If the error pattern has the same structure as the pseudo-random test sequence, the out-of-phase condition is reached.

Table 6. Anomalies, Defects, and Failures

5. Pointers >>