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Triggering a Logic Analyzer on Complex Computer Buses
Sponsored by:
Agilent Technologies

Table of Contents:
Definition and Overview
1. Significance of Complex Buses
2. Operational Overview of Pipelined Buses
3. P6 Family As Example
4. Turning Bus Operation into Bus Triggering
5. Triggering on Transaction Type with Address
6. Building a Complex Trigger
7. Putting It Together
Self-Test
Glossary
Download PDFPDF of this tutorial
Self-Test
1. Most desktop computers have a variety of transaction or pipelined buses.
a. true
b. false
2. Each type of bus contains the same basic transactional elements and pipelining architecture.
a. true
b. false
3. Which is a more efficient way to remove a chunk of data?
a. series of simple data wire transactions
b. burst data transfer
4. The PCI bus does not permit bursting.
a. true
b. false
5. With the P6-family of processors, bus realignment may be achieved by active analysis probes.
a. true
b. false
6. Which is the correct triggering sequence?
a. ADS# = 0, Address = desired, Transaction Type = I/O Write
b. Address = desired, Transaction Type = I/O Write, ADS# = 0
c. Transaction Type = I/O Write, Address = desired, ADS# = 0
d. ADS# = 0, Transaction Type = I/O Write, Address = desired
7. With the P6-family system bus, I/O Write discovery in Level 1 is possible when the queue depth (RNT) is at any value.
a. true
b. false
8. The P6-family system bus can have up to __________ outstanding transactions.
a. two
b. four
c. six
d. eight
9. If the pipeline is more than __________ deep, the flow through the trigger sequence will get stuck in Level 2.
a. two
b. four
c. six
d. eight
10. The specific applications described in the tutorial are extendible to other sophisticated modern buses.
a. true
b. false
Glossary >>

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