The connector launch is a factor in reaching data rates of up to 10 Gbps. Currently, there are two common types of connector launches: the pad/via type and plated through hole. Because of manufacturing limits due to plating of through vias, a pad/drilled via combination has been shown to have a similar lump capacitance value when compared to a reduced diameter PTH for backplane applications (DesignCon 2000).

When a pad is added to this hole, even a very small pad, the added surface capacitance can make the launch look electrically like a larger hole size without a surface pad.

It has been shown (Teradyne, DesignCon 2000) that reducing the diameter of the plated through hole diameter in PCBs reduces the amount of excessive capacitance in the hole, which allows for a better impedance match. Figure 6 illustrates the effect of reducing the diameter of a plated through hole.

Figure 6.

Because any launch has some inductance, the launch impedance has proven to be a better indicator of performance than simple lump capacitance value. Other launch alternatives are currently available, such as laser drilled micro vias and buried vias. Although electrical models show these to be promising, this first cut testing will not include these more exotic technologies.