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Low-Voltage Differential Signaling (LVDS)
2. LVDS Physical Layer
The equivalent circuit structure of the LVDS physical layer is shown in Figure 1. In the driver, a current source limits output to about 3 mA, and a switch box steers the current through the termination resistor. This differential driver produces odd-mode transmission: equal and opposite currents flow in the transmission lines. The current returns within the wire pair, so the current loop area is small and therefore generates the lowest amount of electromagnetic interference (EMI). The current source limits any spike current that could occur during transitions. Because there are no spike currents, data rates as high as 1.5 Gbps are possible without a substantial increase in power dissipation. In addition, the constant current driver output can tolerate transmission lines shorted together or to ground without creating thermal problems.

Figure 1. The Equivalent Circuit Structure of the LVDS Physical Layer
The differential receiver is a high-impedance device that detects differential signals as low as 20 mV and then amplifies them into standard logic levels. The signal has a typical driver offset of 1.2 V, and the receiver accepts an input range of ground to 2.4 V. This allows rejection of common-mode noise picked up along the interconnect of up to ± 1 V.
In addition, hot plugging of LVDS drivers and receivers is possible because the constant current drive eliminates damage potential. Another feature is the receiver’s failsafe function, which prevents output oscillations when the input pins are floating.


