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Table of Contents:

Definition and Overview

1. Significance of Complex Buses

2. Operational Overview of Pipelined Buses

3. P6 Family As Example

4. Turning Bus Operation into Bus Triggering

5. Triggering on Transaction Type with Address

6. Building a Complex Trigger

7. Putting It Together

Self-Test

Glossary

PDF of this tutorial

Definition
Modern logic analyzers attempt to maintain the pace set by complex buses, allowing the use of complex triggering techniques that help unravel the mystery brought to the debug world by the transaction-based bus. A deep pipeline and delayed responses make setting a trigger extremely challenging and sometimes impossible, but combining knowledge of logic analyzer triggering and bus operation enables the customization of triggers for these buses.

Overview
This tutorial examines the impact of modern PC–architecture, input/output (I/O) buses on the debugging and optimization processes.