IEC Newsletter
June 2006, Volume 1 back to index
ESL Design-Is It Worth All the Pain?

Keith S. P. Clarke
Vice President of Technical Marketing, ARM Limited, Cambridge UK

What Does Electronic System Level (ESL) Design Really Mean?

One definition of ESL is a design and simulation environment that allows some or all of the functionality to be abstracted to a higher level, thus allowing significant improvements in simulation performance. For example, one may simulate a system on chip (SoC) with a cycle-approximate version of the main system processor with transactions to represent bus cycles. A simulation environment using these models should be able to process hundreds or thousands of times more instructions than a traditional event-based hardware design language (HDL) simulator. It is also possible to abstract the functionality of certain key functional units so that they run as software on the host simulation machine-for example, performing a special data-processing function such as encryption.

Using ESL design, then, allows for higher-performance simulations, allowing increased design space exploration, increased system validation, and many other benefits. However, in the past, creating an ESL environment of a particular design has not been as straightforward as people had hoped. In addition to choosing a simulation engine, one also needs to consider design entry language, block interface transaction types, profiling, debug and availability of abstracted models, etc. The whole methodology has been maturing rapidly over the past few years, but there are still many areas to consider, including the re-training of engineers in the new methods.

So is using ESL design worth all the pain?

Drivers for Using ESL Methods

Complexity
Selling electronic devices to end users is a highly competitive business with ever-increasing demands on the functionality and cost of those devices. Fortunately, advances in semi-conductor manufacturing technology have enabled a massive increase in the number of transistors and, hence, functions that can be integrated cost-effectively. To deal with the productivity challenge of designing and, increasingly important, verifying all these transistors, many methodology innovations have occurred through the years. For example, the move from transistor design to gate-based design, the move from gates to hardware description languages, and, most recent, the reuse of pre-verified intellectual property (IP) blocks. ESL design offers the opportunity for another order-of-magnitude increase in engineering productivity.

Rapidly Changing End Markets
The most recent decade has been characterized by a massive increase in the consumer market for electronic gadgets. With this increase in volume-and with it vendor competition-there has also been a shift to much shorter product life cycles as consumers rapidly change their demands as fashions come and go. These requirements have led to the need for silicon devices to be reused across multiple end products, both to extend their life in the market and enable the volumes required to cover the ever-increasing non-recurring engineering (NRE) costs of design, verification, and prototype manufacturing. The much higher throughput of ESL design can allow a much greater number of product configurations and scenarios to be simulated during the pre-manufacturing phase, thus maximizing the opportunity for the product.

Reprogrammability and Processors
The reuse of pre-verified IP blocks improves the productivity of the design process. Additionally, the requirement to serve multiple end products with one silicon device means designing as much post-manufacturing flexibility into the devices as possible, i.e., reprogrammability or reconfigurability. Reconfigurable logic definitely has a place, although the silicon area and, subsequently, cost of these logic gates can be many times larger than fixed manufactured gates. Using microprocessors and reprogrammable data processing elements is necessary for many markets to achieve required cost, integration, and flexibility. From a simulation performance perspective, this gives the user the opportunity to use ESL design tools with abstracted, and hence faster, models of the processing elements, since processors naturally lend themselves to abstraction. These processor models must, however, be fully validated to be of sufficient value.

Concurrent Engineering
Another implication of the rapidly changing end market is the need to shorten design cycles. ESL design can be used to perform tradeoffs earlier in the design cycle, as shown in Figure 1.


Figure 1: Early System View Allows Tradeoffs to Be Explored Very Early

Additionally, once the system structure has been created, ESL design allows the handoff of virtual development platforms (soft prototypes) to the software design teams well before the detailed hardware design is complete. Figure 2 shows how the software development process can start concurrently with the register transfer level (RTL) implementation and verification process.


Figure 2: Concurrent Hardware and Software Engineering

Without ESL design, the software team must wait until they are provided with hard prototypes, usually field programmable gate array (FPGA) emulation systems or, much later, systems based on the prototype silicon itself.

Removing the Barriers to ESL Design

Whenever a new methodology is proposed, there is understandable concern regarding the maturity of the tools to support that methodology. Additionally, any new methodology requires some level of retraining for existing engineers practiced in the current methods. Another consideration is to remember that ESL design will only provide the benefits required if the simulation environment offered provides the necessary increase in performance compared to existing HDL-based methods. This can only come when there are sufficiently abstracted and validated models available for the major subsystems in the design.

However, standards such as SystemC are being adopted rapidly and an increasing number of tools and validated models are now available. ESL design is now becoming established in the industry with an increasing number of experienced engineers and mature tools. The benefits are being seen too with reports of significant reductions in time to market and reduced number of late software-hardware validation issues.

ESL design is here to stay.

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